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CODES
2009
IEEE
15 years 4 months ago
A tuneable software cache coherence protocol for heterogeneous MPSoCs
In a multiprocessor system-on-chip (MPSoC) private caches introduce the cache coherence problem. Here, we target at heterogeneous MPSoCs with a network-on-chip (NoC). Existing har...
Frank E. B. Ophelders, Marco Bekooij, Henk Corpora...
ISCA
2000
IEEE
99views Hardware» more  ISCA 2000»
15 years 4 months ago
Transient fault detection via simultaneous multithreading
Smaller feature sizes, reduced voltage levels, higher transistor counts, and reduced noise margins make future generations of microprocessors increasingly prone to transient hardw...
Steven K. Reinhardt, Shubhendu S. Mukherjee
ARVLSI
1997
IEEE
104views VLSI» more  ARVLSI 1997»
15 years 4 months ago
A High-Speed Asynchronous Decompression Circuit for Embedded Processors
This paper describes the architecture and implementation of a high-speed decompression engine for embedded processors. The engine is targeted to processors where embedded programs...
Martin Benes, Andrew Wolfe, Steven M. Nowick
HOTOS
2007
IEEE
15 years 3 months ago
HotComments: How to Make Program Comments More Useful?
Program comments have long been used as a common practice for improving inter-programmer communication and code readability, by explicitly specifying programmers' intentions ...
Lin Tan, Ding Yuan, Yuanyuan Zhou
POPL
1995
ACM
15 years 3 months ago
Default Timed Concurrent Constraint Programming
d Abstract) We extend the model of [VRV94] to express strong time-outs (and pre-emption): if an event A does not happen through time t, cause event B to happen at time t. Such con...
Vijay A. Saraswat, Radha Jagadeesan, Vineet Gupta