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ISCA
2011
IEEE
238views Hardware» more  ISCA 2011»
14 years 1 months ago
Rebound: scalable checkpointing for coherent shared memory
As we move to large manycores, the hardware-based global checkpointing schemes that have been proposed for small shared-memory machines do not scale. Scalability barriers include ...
Rishi Agarwal, Pranav Garg, Josep Torrellas
SIGMOD
2011
ACM
220views Database» more  SIGMOD 2011»
14 years 21 days ago
Zephyr: live migration in shared nothing databases for elastic cloud platforms
Multitenant data infrastructures for large cloud platforms hosting hundreds of thousands of applications face the challenge of serving applications characterized by small data foo...
Aaron J. Elmore, Sudipto Das, Divyakant Agrawal, A...
PPOPP
1990
ACM
15 years 1 months ago
Employing Register Channels for the Exploitation of Instruction Level Parallelism
Abstract - A multiprocessor system capable of exploiting fine-grained parallelism must support efficient synchronization and data passing mechanisms. This paper demonstrates the us...
Rajiv Gupta
ISCA
2006
IEEE
144views Hardware» more  ISCA 2006»
14 years 10 months ago
Conditional Memory Ordering
Conventional relaxed memory ordering techniques follow a proactive model: at a synchronization point, a processor makes its own updates to memory available to other processors by ...
Christoph von Praun, Harold W. Cain, Jong-Deok Cho...
ICRA
2009
IEEE
86views Robotics» more  ICRA 2009»
15 years 4 months ago
Transmission of tactile roughness through master-slave systems
Abstract— In this study, a tactile-roughness transmission system applicable to master-slave systems with a communication time delay is developed. The master-side system construct...
Shogo Okamoto, Masashi Konyo, Takashi Maeno, Satos...