134 search results - page 20 / 27 » Flexible Control of Data Transfers between Parallel Programs |
CC
2003
Springer
15 years 2 months ago
2003
Springer
Abstract. The register allocation in loops is generally performed after or during the software pipelining process. This is because doing a conventional register allocation at firs...
DCOSS
2006
Springer
15 years 1 months ago
2006
Springer
The scope of wireless sensor network (WSN) applications has traditionally been restricted by physical sensor coverage and limited computational power. Meanwhile, IP networks like t...
HPCA
2009
IEEE
15 years 10 months ago
2009
IEEE
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
MICRO
2010
IEEE
14 years 8 months ago
2010
IEEE
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
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DCOSS
2010
Springer
15 years 2 months ago
2010
Springer
Most sensor network applications are dominated by the acquisition of sensor values. Due to energy limitations and high energy costs of communication, in-network processing has been...