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EXPCS
2007
15 years 8 months ago
RiceNIC: a reconfigurable network interface for experimental research and education
The evaluation of new network server architectures is usually performed experimentally using either a simulator or a hardware prototype. Accurate simulation of the hardwaresoftwar...
Jeffrey Shafer, Scott Rixner
172
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IWAN
2004
Springer
15 years 10 months ago
Distributed Instrusion Prevention in Active and Extensible Networks
The proliferation of computer viruses and Internet worms has had a major impact on the Internet Community. Cleanup and control of malicious software (malware) has become a key prob...
Todd S. Sproull, John W. Lockwood
CODES
2007
IEEE
15 years 11 months ago
Scheduling and voltage scaling for energy/reliability trade-offs in fault-tolerant time-triggered embedded systems
In this paper we present an approach to the scheduling and voltage scaling of low-power fault-tolerant hard real-time applications mapped on distributed heterogeneous embedded sys...
Paul Pop, Kåre Harbo Poulsen, Viacheslav Izo...
CODES
2005
IEEE
15 years 10 months ago
Memory access optimizations in instruction-set simulators
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...
Mehrdad Reshadi, Prabhat Mishra
CODES
2009
IEEE
15 years 11 months ago
FRA: a flash-aware redundancy array of flash storage devices
Since flash memory has many attractive characteristics such as high performance, non-volatility, low power consumption and shock resistance, it has been widely used as storage med...
Yangsup Lee, Sanghyuk Jung, Yong Ho Song