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MICRO
2009
IEEE
315views Hardware» more  MICRO 2009»
15 years 6 months ago
Control flow obfuscation with information flow tracking
Recent micro-architectural research has proposed various schemes to enhance processors with additional tags to track various properties of a program. Such a technique, which is us...
Haibo Chen, Liwei Yuan, Xi Wu, Binyu Zang, Bo Huan...
ANCS
2007
ACM
15 years 3 months ago
Ruler: high-speed packet matching and rewriting on NPUs
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...
Tomas Hruby, Kees van Reeuwijk, Herbert Bos
CAV
2010
Springer
161views Hardware» more  CAV 2010»
15 years 3 months ago
Directed Proof Generation for Machine Code
We present the algorithms used in MCVETO (Machine-Code VErification TOol), a tool to check whether a stripped machinecode program satisfies a safety property. The verification p...
Aditya V. Thakur, Junghee Lim, Akash Lal, Amanda B...
CLEF
2010
Springer
15 years 23 days ago
Building Strategies, a Year Later
Abstract. After participating in last year's CLEF IP (2009) evaluation benchmark, our scores were rather low. The CLEF IP 2010 PAC task enabled us to correct some experiments ...
Wouter Alink, Roberto Cornacchia, Arjen P. de Vrie...
CODES
2005
IEEE
15 years 5 months ago
Spatial division multiplexing: a novel approach for guaranteed throughput on NoCs
To ensure low power consumption while maintaining flexibility and performance, future Systems-on-Chip (SoC) will combine several types of processor cores and data memory units of...
Anthony Leroy, Paul Marchal, Adelina Shickova, Fra...