1563 search results - page 100 / 313 » Flexible instruction processors |
104
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ISCA
2002
IEEE
15 years 5 months ago
2002
IEEE
Increasing the number of instruction queue (IQ) entries in a dynamically scheduled processor exposes more instruction-level parallelism, leading to higher performance. However, in...
105
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IPPS
2000
IEEE
15 years 5 months ago
2000
IEEE
The instruction sets of general-purpose microprocessors are designed to offer good performance across a wide range of programs. The size and complexity of the instruction sets, how...
104
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MICRO
1994
IEEE
15 years 4 months ago
1994
IEEE
Multiple issue of instructions occurs in superscalar and VLIW machines. This paper investigates a third type of machine design, which combines the advantages of code compatibility...
116
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FPL
2007
Springer
15 years 4 months ago
2007
Springer
Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. These custom instructions are selected through an analys...
90
Voted
CASES
2010
ACM
14 years 10 months ago
2010
ACM
Common generated instruction selections are based on tree pattern matching, but modern and custom architectures feature instructions, which cannot be covered by trees. To overcome...