Sciweavers

1563 search results - page 105 / 313
» Flexible instruction processors
Sort
View
98
Voted
ASPLOS
2000
ACM
15 years 5 months ago
Symbiotic Jobscheduling for a Simultaneous Multithreading Processor
Simultaneous Multithreading machines fetch and execute instructions from multiple instruction streams to increase system utilization and speedup the execution of jobs. When there ...
Allan Snavely, Dean M. Tullsen
APCSAC
2005
IEEE
15 years 6 months ago
Speculative Issue Logic
In order to enhance the performance of a computer, most modern processors use superscalar architecture and raise the clock frequency. Superscalar architecture can execute more than...
You-Jan Tsai, Jong-Jiann Shieh
IEEEPACT
2002
IEEE
15 years 5 months ago
Eliminating Exception Constraints of Java Programs for IA-64
Java exception checks are designed to ensure that any faulting instruction causing a hardware exception does not terminate the program abnormally. These checks, however, impose so...
Kazuaki Ishizaki, Tatsushi Inagaki, Hideaki Komats...
99
Voted
ATC
2008
Springer
15 years 2 months ago
Concepts for Autonomous Control Flow Checking for Embedded CPUs
In this paper, we introduce new concepts and methods for checking the correctness of control flow instructions during the execution of programs in embedded CPUs. Detecting and avoi...
Daniel Ziener, Jürgen Teich
112
Voted
ARITH
2001
IEEE
15 years 4 months ago
Computer Arithmetic-A Processor Architect's Perspective
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
Ruby B. Lee