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APCSAC
2007
IEEE
15 years 7 months ago
Implicit Transactional Memory in Kilo-Instruction Multiprocessors
Although they have been the main server technology for many years, multiprocessors are undergoing a renaissance due to multi-core chips and the attractive scalability properties of...
Marco Galluzzi, Enrique Vallejo, Adrián Cri...
113
Voted
EUROPAR
2001
Springer
15 years 5 months ago
Execution Latency Reduction via Variable Latency Pipeline and Instruction Reuse
Operand bypass logic might be one of the critical structures for future microprocessors to achieve high clock speed. The delay of the logic imposes the execution time budget to be ...
Toshinori Sato, Itsujiro Arita
116
Voted
ARC
2006
Springer
157views Hardware» more  ARC 2006»
15 years 4 months ago
PISC: Polymorphic Instruction Set Computers
We introduce a new paradigm in the computer architecture referred to as Polymorphic Instruction Set Computers (PISC). This new paradigm, in difference to RISC/CISC, introduces hard...
Stamatis Vassiliadis, Georgi Kuzmanov, Stephan Won...
ICVGIP
2008
15 years 2 months ago
Implementation of the "Local Rank Differences" Image Feature Using SIMD Instructions of CPU
Usage of statistical classifiers, namely AdaBoost and its modifications, in object detection and pattern recognition is a contemporary and popular trend. The computatiponal perfor...
Adam Herout, Pavel Zemcík, Roman Jurá...
122
Voted
PAKDD
2007
ACM
203views Data Mining» more  PAKDD 2007»
15 years 7 months ago
Grammar Guided Genetic Programming for Flexible Neural Trees Optimization
Abstract. In our previous studies, Genetic Programming (GP), Probabilistic Incremental Program Evolution (PIPE) and Ant Programming (AP) have been used to optimal design of Flexibl...
Peng Wu, Yuehui Chen