1563 search results - page 114 / 313 » Flexible instruction processors |
81
Voted
DSN
2006
IEEE
15 years 6 months ago
2006
IEEE
As chip densities and clock rates increase, processors are becoming more susceptible to transient faults that can affect program correctness. Computer architects have typically ad...
92
Voted
IPPS
2006
IEEE
15 years 6 months ago
2006
IEEE
We present a novel technique to secure the execution of a processor against the execution of malicious code (trojans, viruses). The main idea is to permute parts of the opcode val...
123
Voted
ISHPC
1999
Springer
15 years 5 months ago
1999
Springer
Superscalar microprocessor efficiency is generally not as high as anticipated. In fact, sustained utilization below thirty percent of peak is not uncommon, even for fully optimized...
112
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LCTRTS
1998
Springer
15 years 5 months ago
1998
Springer
Abstract. Previously published methods for estimation of the worstcase execution time on contemporary processors with complex pipelines and multi-level memory hierarchies result in...
ICIP
1994
IEEE
16 years 2 months ago
1994
IEEE
A wavelet-based image-encoding is described which, when used in conjunction with the Di erence Engine (a customdesigned VLSI display processor) allows us to reconstruct an image i...