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» Flexible instruction processors
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SIGARCH
2008
107views more  SIGARCH 2008»
15 years 22 days ago
Multitasking workload scheduling on flexible core chip multiprocessors
While technology trends have ushered in the age of chip multiprocessors (CMP) and enabled designers to place an increasing number of cores on chip, a fundamental question is what ...
Divya Gulati, Changkyu Kim, Simha Sethumadhavan, S...
ELPUB
2006
ACM
15 years 6 months ago
Using a Walk Ontology for Capturing Language Independent Navigation Instructions
Walking is becoming increasingly popular as a leisure activity across Europe. Outdoor equipment has modernized, gained flexibility and lost weight. GPS devices are gaining popular...
Bert Paepen, Jan Engelen
209
Voted
ASPLOS
2009
ACM
16 years 1 months ago
Architectural support for SWAR text processing with parallel bit streams: the inductive doubling principle
Parallel bit stream algorithms exploit the SWAR (SIMD within a register) capabilities of commodity processors in high-performance text processing applications such as UTF8 to UTF-...
Robert D. Cameron, Dan Lin
TVLSI
2002
102views more  TVLSI 2002»
15 years 14 days ago
Low-power data forwarding for VLIW embedded architectures
In this paper, we propose a low-power approach to the design of embedded very long instruction word (VLIW) processor architectures based on the forwarding (or bypassing) hardware, ...
Mariagiovanna Sami, Donatella Sciuto, Cristina Sil...
103
Voted
VLSID
2004
IEEE
107views VLSI» more  VLSID 2004»
16 years 1 months ago
Performance Analysis of Inter Cluster Communication Methods in VLIW Architecture
With increasing demands for high performance by embedded systems, especially by digital signal processing applications, embedded processors must increase available instruction lev...
Sourabh Saluja, Anshul Kumar