1563 search results - page 119 / 313 » Flexible instruction processors |
111
Voted
MICRO
1992
IEEE
15 years 4 months ago
1992
IEEE
An important design decision in the implementation of a superscalar processor is the amount of hardware to allocate to the instruction scheduling mechanism. Dynamic scheduling pro...
DAC
1995
ACM
15 years 4 months ago
1995
ACM
—We address the problem of code optimization for embedded DSP microprocessors. Such processors (e.g., those in the TMS320 series) have highly irregular datapaths, and conventiona...
88
Voted
IJCSA
2008
15 years 25 days ago
2008
Vector extensions for general purpose processors are an efficient feature to address the growing performance demand of multimedia and computer vision applications. Embedded proces...
JSA
2007
15 years 22 days ago
2007
This paper presents a scalable and partitionable asynchronous bus arbiter for use with chip multiprocessors (CMP) and its corresponding pre-layout simulation results using VHDL. T...
124
Voted
SIGMOD
2002
ACM
16 years 29 days ago
2002
ACM
Modern CPUs have instructions that allow basic operations to be performed on several data elements in parallel. These instructions are called SIMD instructions, since they apply a...