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HICSS
1994
IEEE
127views Biometrics» more  HICSS 1994»
15 years 4 months ago
Angel: Resource Unification in a.64-bit Microkernel
The appearance of 64-bit processors allows a new approach to microkernel desagn From our experience with a message passang microkernel MESHIX, we discovered that a multi-address s...
Kevin Murray, Tim Wilkinson, Tom Stiemerling, Paul...
CONPAR
1994
15 years 4 months ago
The Rewrite Rule Machine Node Architecture and Its Performance
The Rewrite Rule Machine (RRM) is a massively parallel MIMD/SIMD computer designed with the explicit purpose of supporting veryhigh-level parallel programming with rewrite rules. T...
Patrick Lincoln, José Meseguer, Livio Ricci...
DDECS
2008
IEEE
227views Hardware» more  DDECS 2008»
15 years 1 months ago
Cryptographic System on a Chip based on Actel ARM7 Soft-Core with Embedded True Random Number Generator
The paper introduces a cryptographic System on a Chip (SoC) implementation based on recent Actel nonvolatile FPGA Fusion chip with embedded ARM7 soft-core processor. The SoC is bui...
Milos Drutarovsky, Michal Varchola
FPL
2008
Springer
116views Hardware» more  FPL 2008»
15 years 1 months ago
NOC architecture design for multi-cluster chips
For the next generation of multi-core processors, the onchip interconnection networks must be efficient to achieve high data throughput and performance. Moreover, these interconne...
Henrique C. Freitas, Philippe Olivier Alexandre Na...
ERSA
2006
98views Hardware» more  ERSA 2006»
15 years 1 months ago
Hydra: An Energy-efficient and Reconfigurable Network Interface
Abstract-- In heterogeneous tiled System-on-Chip architectures a Network-on-Chip is used to transport messages between processing elements. A reconfigurable network interface is us...
Marcel D. van de Burgwal, Gerard J. M. Smit, Gerar...