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IJES
2006
72views more  IJES 2006»
14 years 12 months ago
System-level parallelism and concurrency maximisation in reconfigurable computing applications
: Reconfigurable Computers can leverage the synergism between conventional processors and FPGAs to provide both hardware functionalities and general-purpose computers flexibility. ...
Esam El-Araby, Mohamed Taher, Kris Gaj, Tarek A. E...
TCAD
2002
86views more  TCAD 2002»
14 years 11 months ago
Platune: a tuning framework for system-on-a-chip platforms
System-on-a-chip (SOC) platform manufacturers are increasingly adding configurable features that provide power and performance flexibility in order to increase a platform's ap...
Tony Givargis, Frank Vahid
ICIP
1995
IEEE
16 years 1 months ago
Parallel programmable video co-processor design
Modern video applications call for computationally intensive data processing at very high data rate. In order to meet the high-performance/low-cost constraints, the stateof-the-ar...
An-Yeu Wu, K. J. Ray Liu, Arun Raghupathy, Shang-C...
DAC
2009
ACM
16 years 26 days ago
Handling don't-care conditions in high-level synthesis and application for reducing initialized registers
Don't-care conditions provide additional flexibility in logic synthesis and optimization. However, most work only focuses on the gate level because it is difficult to handle ...
Hong-Zu Chou, Kai-Hui Chang, Sy-Yen Kuo
DAC
2008
ACM
16 years 26 days ago
Energy-optimal software partitioning in heterogeneous multiprocessor embedded systems
Embedded systems with heterogeneous processors extend the energy/timing trade-off flexibility and provide the opportunity to fine tune resource utilization for particular applicat...
Michel Goraczko, Jie Liu, Dimitrios Lymberopoulos,...