1563 search results - page 280 / 313 » Flexible instruction processors |
CAL
2007
14 years 11 months ago
2007
—Several recently proposed techniques including CPR (Checkpoint Processing and Recovery) and NoSQ (No Store Queue) rely on reference counting to manage physical registers. Howeve...
114
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CASES
2010
ACM
14 years 9 months ago
2010
ACM
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
107
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EWSPT
2003
Springer
15 years 5 months ago
2003
Springer
We present a new approach for the management and enactment of deployment process by a deployment processor ORYA (Open enviRonment to deploY Applications). ORYA aims to integrate te...
HPCA
1998
IEEE
15 years 4 months ago
1998
IEEE
Over the past few years there has been increased interest in building custom computing machines (CCMs) as a way of achieving very high performance on specific problems. The advent...
121
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ASPLOS
1996
ACM
15 years 4 months ago
1996
ACM
This paper describes Shasta, a system that supports a shared address space in software on clusters of computers with physically distributed memory. A unique aspect of Shasta compa...