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ISLPED
2004
ACM
139views Hardware» more  ISLPED 2004»
15 years 5 months ago
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...
Kim M. Hazelwood, David Brooks
IEEEINTERACT
2003
IEEE
15 years 5 months ago
A Region-Based Compilation Infrastructure
: The traditional framework for back-end compilation is based on the scope of functions, which is a natural boundary to partition an entire program for compilation. However, the si...
Yang Liu, Zhaoqing Zhang, Ruliang Qiao, Roy Dz-Chi...
CASES
2003
ACM
15 years 5 months ago
Extending STI for demanding hard-real-time systems
Software thread integration (STI) is a compilation technique which enables the efficient use of an application’s fine-grain idle time on generic processors without special hardw...
Benjamin J. Welch, Shobhit O. Kanaujia, Adarsh See...
PLDI
2003
ACM
15 years 5 months ago
A compiler framework for speculative analysis and optimizations
Speculative execution, such as control speculation and data speculation, is an effective way to improve program performance. Using edge/path profile information or simple heuristi...
Jin Lin, Tong Chen, Wei-Chung Hsu, Pen-Chung Yew, ...
ISCA
2002
IEEE
95views Hardware» more  ISCA 2002»
15 years 4 months ago
Design Tradeoffs for the Alpha EV8 Conditional Branch Predictor
This paper presents the Alpha EV8 conditional branch predictor. The Alpha EV8 microprocessor project, canceled in June 2001 in a late phase of development, envisioned an aggressiv...
André Seznec, Stephen Felix, Venkata Krishn...