1563 search results - page 303 / 313 » Flexible instruction processors |
ICS
2001
Tsinghua U.
15 years 4 months ago
2001
Tsinghua U.
Recent proposals for Chip Multiprocessors (CMPs) advocate speculative, or implicit, threading in which the hardware employs prediction to peel off instruction sequences (i.e., imp...
CGO
2010
IEEE
15 years 4 months ago
2010
IEEE
Shadow value tools use metadata to track properties of application data at the granularity of individual machine instructions. These tools provide effective means of monitoring an...
CODES
1999
IEEE
15 years 4 months ago
1999
IEEE
o much higher levels of abstraction than today's design practices, which are usually at the level of synthesizable RTL for custom hardware or Instruction Set Simulator (ISS) f...
HIPC
1999
Springer
15 years 4 months ago
1999
Springer
We describe a radically new cache architecture and demonstrate that it offers a huge reduction in cache cost, size and power consumption whilst maintaining performance on a wide ra...
106
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ISHPC
1999
Springer
15 years 4 months ago
1999
Springer
On-chip multiprocessor can be an alternative to the wide-issue superscalar processor approach which is currently the mainstream to exploit the increasing number of transistors on ...