1563 search results - page 307 / 313 » Flexible instruction processors |
105
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TJS
2002
14 years 9 months ago
2002
Historically, compilers have operated by applying a fixed set of optimizations in a predetermined order. We call such an ordered list of optimizations a compilation sequence. This...
96
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ISCA
2010
IEEE
14 years 8 months ago
2010
IEEE
Due to their high volume, general-purpose processors, and now chip multiprocessors (CMPs), are much more cost effective than ASICs, but lag significantly in terms of performance a...
101
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ISPDC
2010
IEEE
14 years 8 months ago
2010
IEEE
—Super-scalar, out-of-order processors that can have tens of read and write requests in the execution window place significant demands on Memory Level Parallelism (MLP). Multi- ...
ICCAD
2009
IEEE
14 years 7 months ago
2009
IEEE
Multi-core processors have become an integral part of mainstream high performance computer systems. In parallel, exponentially increasing power density and packaging costs have ne...
116
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TVLSI
2010
14 years 4 months ago
2010
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...