1563 search results - page 76 / 313 » Flexible instruction processors |
CHES
2008
Springer
15 years 2 months ago
2008
Springer
Bit-slicing is a non-conventional implementation technique for cryptographic software where an n-bit processor is considered as a collection of n 1-bit execution units operating in...
125
Voted
HIPEAC
2010
Springer
15 years 2 months ago
2010
Springer
Abstract. Customizable processors augmented with application-specific Instruction Set Extensions (ISEs) have begun to gain traction in recent years. The most effective ISEs include...
66
Voted
IFIP
1993
Springer
15 years 4 months ago
1993
Springer
An advanced Self-Timed Reduced Instruction Set Computer (ST-RISC) architecture is described. It is designed hierarchically, and is formally specified functionally at the various ...
109
Voted
MICRO
2005
IEEE
15 years 6 months ago
2005
IEEE
As more data value speculation mechanisms are being proposed to speed-up processors, there is growing pressure on the critical processor structures that must buffer the state of t...
84
Voted
WMPI
2004
ACM
15 years 6 months ago
2004
ACM
The ever increasing gap in processor and memory speeds has a very negative impact on performance. One possible solution to overcome this problem is the Kilo-instruction processor. ...