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ENTCS
2006
107views more  ENTCS 2006»
15 years 21 days ago
Exact and Portable Profiling for the JVM Using Bytecode Instruction Counting
This paper presents a novel profiling approach, which is entirely based on program transformation techniques in order to enable exact profiling, preserving complete call stacks, m...
Walter Binder, Jarle Hulaas
MICRO
2003
IEEE
96views Hardware» more  MICRO 2003»
15 years 6 months ago
Scalable Hardware Memory Disambiguation for High ILP Processors
This paper describes several methods for improving the scalability of memory disambiguation hardware for future high ILP processors. As the number of in-flight instructions grows...
Simha Sethumadhavan, Rajagopalan Desikan, Doug Bur...
CF
2011
ACM
14 years 20 days ago
SIFT: a low-overhead dynamic information flow tracking architecture for SMT processors
Dynamic Information Flow Tracking (DIFT) is a powerful technique that can protect unmodified binaries from a broad range of vulnerabilities such as buffer overflow and code inj...
Meltem Ozsoy, Dmitry Ponomarev, Nael B. Abu-Ghazal...
85
Voted
ICS
2000
Tsinghua U.
15 years 4 months ago
A low-complexity issue logic
One of the main concerns in today's processor design is the issue logic. Instruction-level parallelism is usually favored by an out-of-order issue mechanism where instruction...
Ramon Canal, Antonio González
102
Voted
ICPP
2002
IEEE
15 years 5 months ago
Out-of-Order Instruction Fetch Using Multiple Sequencers
Conventional instruction fetch mechanisms fetch contiguous blocks of instructions in each cycle. They are difficult to scale since taken branches make it hard to increase the siz...
Paramjit S. Oberoi, Gurindar S. Sohi