1563 search results - page 85 / 313 » Flexible instruction processors |
96
Voted
IEEEPACT
2002
IEEE
15 years 5 months ago
2002
IEEE
Memory dependence prediction allows out-of-order issue processors to achieve high degrees of instruction level parallelism by issuing load instructions at the earliest time withou...
ARITH
2007
IEEE
15 years 4 months ago
2007
IEEE
An algorithm for inversion in GF(2m ) suitable for implementation using a polynomial multiply instruction on GF(2) is proposed. It is based on the extended Euclid's algorithm...
77
Voted
IROS
2009
IEEE
15 years 7 months ago
2009
IEEE
Abstract— Robotics researchers are often faced with realtime constraints, and for that reason algorithmic and implementation-level optimization can dramatically increase the over...
114
Voted
ISORC
2007
IEEE
15 years 7 months ago
2007
IEEE
Modern processors used in embedded systems are becoming increasingly powerful, having features like caches and pipelines to speedup execution. While execution speed of embedded so...
75
Voted
ICCD
2004
IEEE
15 years 9 months ago
2004
IEEE
In many workloads, 25% to 50% of instructions have slack allowing them to be delayed without impacting performance. To exploit this slack, processors may implement more power-efï¬...