1563 search results - page 96 / 313 » Flexible instruction processors |
107
Voted
IPPS
2005
IEEE
15 years 6 months ago
2005
IEEE
An architecture for a reconfigurable superscalar processor is described in which some of its execution units are implemented in reconfigurable hardware. The overall configuration ...
WMPI
2004
ACM
15 years 6 months ago
2004
ACM
High-performance out-of-order processors spend a significant portion of their execution time on the incorrect program path even though they employ aggressive branch prediction al...
109
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ISLPED
2003
ACM
15 years 6 months ago
2003
ACM
This paper develops a technique that uniquely combines the advantages of static scheduling and dynamic scheduling to reduce the energy consumed in modern superscalar processors wi...
93
Voted
PDCN
2007
15 years 2 months ago
2007
This paper describes the design and evaluation of an auto-memoization processor. The major point of this proposal is to detect the multilevel functions and loops with no additiona...
125
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ESTIMEDIA
2005
Springer
15 years 6 months ago
2005
Springer
Designing Application-Specific Instruction-set Processors (ASIPs) usually requires designing a custom datapath, and modifying instruction-set, instruction decoder, and compiler. A...