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» Floorplanning for Partial Reconfiguration in FPGAs
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FCCM
1997
IEEE
111views VLSI» more  FCCM 1997»
15 years 3 months ago
Real-time stereo vision on the PARTS reconfigurable computer
This paper describes a powerful, scalable, reconfigurable computer called the PARTS engine. The PARTS engine consists of 16 Xilinx 4025 FPGAs, and 16 one-megabyte SRAMs. The FPGAs...
John Woodfill, Brian Von Herzen
ERSA
2006
100views Hardware» more  ERSA 2006»
15 years 16 days ago
Relocation and Defragmentation for Heterogeneous Reconfigurable Systems
Current FPGAs are heterogeneous partially reconfigurable architectures, consisting of several resource types, e. g., logic cells and embedded memory. By using partial reconfigurat...
Markus Koester, Heiko Kalte, Mario Porrmann
TVLSI
2002
116views more  TVLSI 2002»
14 years 10 months ago
Configuration relocation and defragmentation for run-time reconfigurable computing
Due to its potential to greatly accelerate a wide variety of applications, reconfigurable computing has become a subject of a great deal of research. By mapping the compute-intens...
Katherine Compton, Zhiyuan Li, James Cooley, Steph...
FPL
2005
Springer
140views Hardware» more  FPL 2005»
15 years 4 months ago
A Configuration Memory Architecture for Fast Run-Time-Reconfiguration of FPGAs
This paper presents a configuration memory architecture that offers fast FPGA reconfiguration. The underlying principle behind the design is the use of fine-grained partial rec...
Usama Malik, Oliver Diessel
SBCCI
2004
ACM
111views VLSI» more  SBCCI 2004»
15 years 4 months ago
A partial reconfigurable architecture for controllers based on Petri nets
Digital Control System in the industry has been used in most of the applications based on expensive Programmable Logical Controllers (PLC). These Systems are, in general, highly c...
Paulo Sérgio B. do Nascimento, Paulo Romero...