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IPPS
2006
IEEE
15 years 3 months ago
An adaptive system-on-chip for network applications
This paper presents the hardware architecture of DynaCORE, a dynamically reconfigurable system-on-chip for network applications. DynaCORE is an application specific coprocessor ...
Roman Koch, Thilo Pionteck, Carsten Albrecht, Erik...
FPL
2005
Springer
149views Hardware» more  FPL 2005»
15 years 3 months ago
Heterogeneity Exploration for Multiple 2D Filter Designs
Many image processing applications require fast convolution of an image with a set of large 2D filters. Field - Programmable Gate Arrays (FPGAs) are often used to achieve this go...
Christos-Savvas Bouganis, Peter Y. K. Cheung, Geor...
TC
2008
14 years 9 months ago
Automatic Generation of Modular Multipliers for FPGA Applications
Since redundant number systems allow for constant time addition, they are often at the heart of modular multipliers designed for public key cryptography (PKC) applications. Indeed,...
Jean-Luc Beuchat, Jean-Michel Muller
VLSISP
2008
145views more  VLSISP 2008»
14 years 9 months ago
Area, Delay, and Power Characteristics of Standard-Cell Implementations of the AES S-Box
Cryptographic substitution boxes (S-boxes) are an integral part of modern block ciphers like the Advanced Encryption Standard (AES). There exists a rich literature devoted to the ...
Stefan Tillich, Martin Feldhofer, Thomas Popp, Joh...
SIGMOD
2011
ACM
179views Database» more  SIGMOD 2011»
14 years 13 days ago
How soccer players would do stream joins
In spite of the omnipresence of parallel (multi-core) systems, the predominant strategy to evaluate window-based stream joins is still strictly sequential, mostly just straightfor...
Jens Teubner, René Müller