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» Floorplanning in Modern FPGAs
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DAC
2005
ACM
15 years 10 months ago
Incremental exploration of the combined physical and behavioral design space
Achieving design closure is one of the biggest headaches for modern VLSI designers. This problem is exacerbated by high-level design automation tools that ignore increasingly impo...
Zhenyu (Peter) Gu, Jia Wang, Robert P. Dick, Hai Z...
FPGA
2006
ACM
93views FPGA» more  FPGA 2006»
15 years 1 months ago
Measuring the gap between FPGAs and ASICs
This paper presents experimental measurements of the differences between a 90nm CMOS FPGA and 90nm CMOS Standard Cell ASICs in terms of logic density, circuit speed and power cons...
Ian Kuon, Jonathan Rose
DATE
2009
IEEE
150views Hardware» more  DATE 2009»
15 years 4 months ago
A software-supported methodology for exploring interconnection architectures targeting 3-D FPGAs
—Interconnect structures significantly contribute to the delay, power consumption, and silicon area of modern reconfigurable architectures. The demand for higher clock frequencie...
Kostas Siozios, Vasilis F. Pavlidis, Dimitrios Sou...
69
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DAC
2008
ACM
15 years 10 months ago
TuneFPGA: post-silicon tuning of dual-Vdd FPGAs
Modern CMOS manufacturing processes have significant variability, which necessitates guard banding to achieve reasonable yield. We study an FPGA architecture with a dual voltage s...
Stephen Bijansky, Adnan Aziz
FPGA
2005
ACM
121views FPGA» more  FPGA 2005»
15 years 3 months ago
Floating-point sparse matrix-vector multiply for FPGAs
Large, high density FPGAs with high local distributed memory bandwidth surpass the peak floating-point performance of high-end, general-purpose processors. Microprocessors do not...
Michael DeLorimier, André DeHon