161 search results - page 14 / 33 » Floorplanning with Datapath Optimization |
ASPDAC
1999
ACM
15 years 1 months ago
1999
ACM
In the past two decades, the simulated annealing technique has been considered as a powerful approach to handle many NP-hard optimization problems in VLSI designs. Recently, a new...
61
Voted
ASPDAC
2004
ACM
15 years 1 months ago
2004
ACM
Abstract - We propose an integrated archltectural/physicdplanning approach named priority assignment optimization to mioimize the current surge in high performance power eifkient c...
ASPDAC
2000
ACM
15 years 2 months ago
2000
ACM
Simulated annealing has been one of the most popular stochastic optimization methods used in the VLSI CAD field in the past two decades for handling NP-hard optimization problems...
77
Voted
DAC
2000
ACM
15 years 10 months ago
2000
ACM
In this paper we describe a new hardware/software partitioning approach for embedded reconfigurable architectures consisting of a general-purpose processor (CPU), a dynamically re...
ISCAS
2007
IEEE
15 years 3 months ago
2007
IEEE
—A shared bus is a suitable structure for minimizing the interconnections costs in system synthesis. It has also been shown that the word-length of Functional Units has a great i...