Sciweavers

161 search results - page 16 / 33
» Floorplanning with Datapath Optimization
Sort
View
ICCCN
2008
IEEE
15 years 4 months ago
A Distributed Routing Algorithm for Networks with Data-Path Services
Abstract—Many next-generation Internet architectures propose advanced packet processing functions in the data path of the network. Such “services” are typically performed on ...
Xin Huang, Sivakumar Ganapathy, Tilman Wolf
ASPDAC
2005
ACM
119views Hardware» more  ASPDAC 2005»
14 years 11 months ago
CMP aware shuttle mask floorplanning
- By putting different chips on the same mask, shuttle mask (or multiple project wafer) provides an economical solution for low volume designs and design prototypes to share the ri...
Gang Xu, Ruiqi Tian, David Z. Pan, Martin D. F. Wo...
FPGA
2004
ACM
158views FPGA» more  FPGA 2004»
15 years 3 months ago
A novel coarse-grain reconfigurable data-path for accelerating DSP kernels
In this paper, an efficient implementation of a high performance coarse-grain reconfigurable data-path on a mixed-granularity reconfigurable platform is presented. It consists of ...
Michalis D. Galanis, George Theodoridis, Spyros Tr...
DAC
1999
ACM
15 years 1 months ago
Reducing Cross-Coupling Among Interconnect Wires in Deep-Submicron Datapath Design
As the CMOS technology enters the deep submicron design era, the lateral inter-wire coupling capacitance becomes the dominant part of load capacitance and makes RC delay on the bu...
Joon-Seo Yim, Chong-Min Kyung
77
Voted
ASPDAC
2005
ACM
100views Hardware» more  ASPDAC 2005»
14 years 11 months ago
Microarchitecture evaluation with floorplanning and interconnect pipelining
— As microprocessor technology continues to scale into the nanometer regime, recent studies show that interconnect delay will be a limiting factor for performance, and multiple c...
Ashok Jagannathan, Hannah Honghua Yang, Kris Konig...