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» Floorplanning with Datapath Optimization
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ISLPED
1999
ACM
236views Hardware» more  ISLPED 1999»
15 years 1 months ago
Modeling and automating selection of guarding techniques for datapath elements
While guarded evaluation has proven an effective energy saving technique in arithmetic circuits, good methodologies do not exist for determining when and how to guard for maximal ...
William E. Dougherty, Donald E. Thomas
ICCAD
2007
IEEE
99views Hardware» more  ICCAD 2007»
15 years 6 months ago
Temperature aware microprocessor floorplanning considering application dependent power load
This paper studies microprocessor floorplanning considering thermal and throughput optimization. We first develop a stochastic heat diffusion model taking into account the appl...
Chunta Chu, Xinyi Zhang, Lei He, Tong Jing
DATE
2002
IEEE
158views Hardware» more  DATE 2002»
15 years 2 months ago
Congestion Estimation with Buffer Planning in Floorplan Design
In this paper, we study and implement a routabilitydriven floorplanner with buffer block planning. It evaluates the routability of a floorplan by computing the probability that ...
Wai-Chiu Wong, Chiu-Wing Sham, Evangeline F. Y. Yo...
DAC
2009
ACM
15 years 10 months ago
Handling complexities in modern large-scale mixed-size placement
In this paper, we propose an effective algorithm flow to handle largescale mixed-size placement. The basic idea is to use floorplanning to guide the placement of objects at the gl...
Jackey Z. Yan, Natarajan Viswanathan, Chris Chu
73
Voted
TCAD
2008
89views more  TCAD 2008»
14 years 9 months ago
A New Multilevel Framework for Large-Scale Interconnect-Driven Floorplanning
We present in this paper a new interconnect-driven multilevel floorplanner, called interconnect-driven multilevelfloorplanning framework (IMF), to handle large-scale buildingmodule...
Tung-Chieh Chen, Yao-Wen Chang, Shyh-Chang Lin