161 search results - page 22 / 33 » Floorplanning with Datapath Optimization |
DAC
2000
ACM
15 years 10 months ago
2000
ACM
In this paper, we presen t the design and use of a comprehensiv e framework, SimplePower, for evaluating the e ect of high-level algorithmic, architectural, and compilation tradeo...
DATE
2010
IEEE
15 years 1 months ago
2010
IEEE
High-level synthesis has recently started to gain industrial acceptance, due to the improved quality of results and the multi-objective optimizations offered. One optimization area...
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
: Common sub-expression elimination (CSE) serves as a useful optimization technique in the synthesis of arithmetic datapaths described at RTL. However, CSE has a limited potential ...
DATE
2010
IEEE
15 years 2 months ago
2010
IEEE
Abstract—Reducing resource usage is one of the most important optimization objectives in behavioral synthesis due to its direct impact on power, performance and cost. The datapat...
ENGL
2008
14 years 9 months ago
2008
This paper discusses novel dedicated hardware architecture for hybrid optimization based on Genetic algorithm (GA) and Simulated Annealing (SA). The proposed architecture achieves ...