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FPL
2010
Springer
148views Hardware» more  FPL 2010»
14 years 9 months ago
FEM: A Step Towards a Common Memory Layout for FPGA Based Accelerators
FPGA devices are mostly utilized for customized application designs with heavily pipelined and aggressively parallel computations. However, little focus is normally given to the FP...
Muhammad Shafiq, Miquel Pericàs, Nacho Nava...
ICCAD
2001
IEEE
111views Hardware» more  ICCAD 2001»
15 years 8 months ago
Congestion Aware Layout Driven Logic Synthesis
In this paper, we present novel algorithms that effectively combine physical layout and early logic synthesis to improve overall design quality. In addition, we employ partitionin...
Thomas Kutzschebauch, Leon Stok
CLUSTER
2001
IEEE
15 years 3 months ago
Clusterfile: A Flexible Physical Layout Parallel File System
This paper presents Clusterfile, a parallel file system that provides parallel file access on a cluster of computers. Existing parallel file systems offer little control over matc...
Florin Isaila, Walter F. Tichy
IJDAR
2007
69views more  IJDAR 2007»
14 years 11 months ago
User-driven page layout analysis of historical printed books
In this paper, based on the study of the specificity of historical printed books, we first explain the main error sources in classical methods used for page layout analysis. We sho...
Jean-Yves Ramel, S. Leriche, M. L. Demonet, S. Bus...
BICOB
2009
Springer
15 years 6 months ago
Generalized Binary Tanglegrams: Algorithms and Applications
Several applications require the joint display of two phylogenetic trees whose leaves are matched by inter-tree edges. This issue arises, for example, when comparing gene trees and...
Mukul S. Bansal, Wen-Chieh Chang 0002, Oliver Eule...