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ISORC
2000
IEEE
15 years 4 months ago
TCP Throughput and Buffer Management
There have been many debates about the feasibility of providing guaranteed Quality of Service (QoS) when network traffic travels beyond the enterprise domain and into the vast unk...
Todd Lizambri, Fernando Duran, Shukri Wakid
CODES
2004
IEEE
15 years 3 months ago
Hardware synthesis from coarse-grained dataflow specification for fast HW/SW cosynthesis
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification for fast HW/SW cosynthesis. A node in DFG represents a coarse grain block such as FIR and...
Hyunuk Jung, Soonhoi Ha
FPL
2006
Springer
158views Hardware» more  FPL 2006»
15 years 3 months ago
Actual-Delay Circuits on FPGA: Trading-Off Luts for Speed
FPGA devices exhibit manufacturing variability. Device ratings and Timing margins are typically used in order to cope with inter-device and intra-device variability respectively. ...
Evangelia Kassapaki, Pavlos M. Mattheakis, Christo...
USS
2008
15 years 2 months ago
Modeling the Trust Boundaries Created by Securable Objects
One of the most critical steps of any security review involves identifying the trust boundaries that an application is exposed to. While methodologies such as threat modeling can ...
Matt Miller
TIP
2002
111views more  TIP 2002»
14 years 11 months ago
Synergizing spatial and temporal texture
Temporal texture accounts for a large proportion of motion commonly experienced in the visual world. Current temporal texture techniques extract primarily motion-based features for...
Chin-Hwee Peh, Loong Fah Cheong