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LCTRTS
2010
Springer
14 years 7 months ago
Compiler directed network-on-chip reliability enhancement for chip multiprocessors
Chip multiprocessors (CMPs) are expected to be the building blocks for future computer systems. While architecting these emerging CMPs is a challenging problem on its own, program...
Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin,...
TIT
2010
111views Education» more  TIT 2010»
14 years 4 months ago
Designing floating codes for expected performance
Floating codes are codes designed to store multiple values in a Write Asymmetric Memory, with applications to flash memory. In this model, a memory consists of a block of n cells, ...
Flavio Chierichetti, Hilary Finucane, Zhenming Liu...
WWW
2011
ACM
14 years 4 months ago
Automatic construction of a context-aware sentiment lexicon: an optimization approach
The explosion of Web opinion data has made essential the need for automatic tools to analyze and understand people’s sentiments toward different topics. In most sentiment analy...
Yue Lu, Malú Castellanos, Umeshwar Dayal, C...
CODES
2011
IEEE
13 years 9 months ago
DistRM: distributed resource management for on-chip many-core systems
The trend towards many-core systems comes with various issues, among them their highly dynamic and non-predictable workloads. Hence, new paradigms for managing resources of many-c...
Sebastian Kobbe, Lars Bauer, Daniel Lohmann, Wolfg...
115
Voted
TMC
2012
12 years 12 months ago
Modeling and Performance Evaluation of Backoff Misbehaving Nodes in CSMA/CA Networks
—Backoff misbehavior, in which a wireless node deliberately manipulates its backoff time, can induce significant network problems, such as severe unfairness and denial-of-servic...
Zhuo Lu, Wenye Wang, Cliff Wang