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» Forensic engineering techniques for VLSI CAD tools
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VLSID
2009
IEEE
155views VLSI» more  VLSID 2009»
15 years 10 months ago
Unified Challenges in Nano-CMOS High-Level Synthesis
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
Saraju P. Mohanty
SIGSOFT
2007
ACM
15 years 10 months ago
Reconciling software configuration management and product data management
Product Data Management (PDM) and Software Configuration Management (SCM) are the disciplines of building and controlling the evolution of a complex artifacts; either physical or ...
Germán Vega, Jacky Estublier
DAC
2003
ACM
15 years 10 months ago
Improved global routing through congestion estimation
In this paper, we present a new method to improve global routing results. By using an amplified congestion estimate to influence a rip-up and reroute approach, we obtain substanti...
Raia Hadsell, Patrick H. Madden
ISPD
2005
ACM
205views Hardware» more  ISPD 2005»
15 years 3 months ago
Coupling aware timing optimization and antenna avoidance in layer assignment
The sustained progress of VLSI technology has altered the landscape of routing which is a major physical design stage. For timing driven routings, traditional approaches which con...
Di Wu, Jiang Hu, Rabi N. Mahapatra
IJSM
2007
85views more  IJSM 2007»
14 years 9 months ago
Constraint Modeling for Curves and Surfaces in CAGD: a Survey
Computer-Aided Geometric Design modelers are now based on powerful mathematical curve and surface models, but there is still a considerable need for efficient tools to handle, ana...
Vincent Cheutet, Marc Daniel, Stefanie Hahmann, Ra...