475 search results - page 48 / 95 » Formal Analysis of Processor Timing Models |
144
click to vote
FM
2009
Springer
15 years 7 months ago
2009
Springer
We study a clock synchronization protocol for the Chess WSN. First, we model the protocol as a network of timed automata and verify various instances using the Uppaal model checker...
197
click to vote
DATE
2011
IEEE
14 years 7 months ago
2011
IEEE
Current processors are optimized for average case performance, often leading to a high worst-case execution time (WCET). Many architectural features that increase the average case...
163
click to vote
SIGECOM
2005
ACM
15 years 8 months ago
2005
ACM
This paper concerns the design of mechanisms for online scheduling in which agents bid for access to a re-usable resource such as processor time or wireless network access. Each a...
111
Voted
SIGMETRICS
2002
ACM
15 years 2 months ago
2002
ACM
Probability distributions of response times are important in the design and analysis of transaction processing systems and computercommunication systems. We present a general tech...
136
click to vote
EMSOFT
2006
Springer
15 years 7 months ago
2006
Springer
We report on a case study in which the model checker Uppaal is used to formally model parts of Zeroconf, a protocol for dynamic configuration of IPv4 link-local addresses that has...