475 search results - page 58 / 95 » Formal Analysis of Processor Timing Models |
134
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EURODAC
1994
IEEE
15 years 7 months ago
1994
IEEE
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
118
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CAISE
2005
Springer
15 years 8 months ago
2005
Springer
To achieve inter-enterprise software interoperability, the semantics of interchanged information by using electronic business documents, has to be explicitly modeled. A common appr...
105
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ENTCS
2002
15 years 3 months ago
2002
This paper presents PLCTools, a formal environment for designing and simulating programmable controllers. Control models are specified with IEC FBD (Function Block Diagram), and t...
147
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SAFECOMP
2010
Springer
15 years 1 months ago
2010
Springer
Abstract. Model-based development and automated code generation are increasingly used for actual production code, in particular in mathematical and engineering domains. However, si...
144
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RTS
2006
15 years 3 months ago
2006
Component middleware provides dependable and efficient platforms that support key functional, and quality of service (QoS) needs of distributed real-time embedded (DRE) systems. C...