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IV
2003
IEEE
92views Visualization» more  IV 2003»
15 years 9 months ago
A Visual Formalism for Graphical User Interfaces based on State Transition Diagrams
In this paper we present a “lightweight” visual formalism that can be used to examine the state space complexity of an interface. The method can form a basis for designing, te...
Carsten Maple, Tim French, Marc Conrad
DSD
2002
IEEE
102views Hardware» more  DSD 2002»
15 years 9 months ago
Formal Verification of a DSP Chip Using an Iterative Approach
In this paper we describe a methodology for the formal verification of a DSP chip using the HOL theorem prover. We used an iterative method to specify both the behavioral and stru...
Ali Habibi, Sofiène Tahar, Adel Ghazel
ATVA
2009
Springer
141views Hardware» more  ATVA 2009»
15 years 8 months ago
Formal Verification for High-Assurance Behavioral Synthesis
We present a framework for certifying hardware designs generated through behavioral synthesis, by using formal verification to certify the associated synthesis transformations. We ...
Sandip Ray, Kecheng Hao, Yan Chen, Fei Xie, Jin Ya...
FDL
2004
IEEE
15 years 7 months ago
The Formal Simulation Semantics of SystemVerilog
We present a rigorous but transparent semantics definition of SystemVerilog that covers processes with blocking and non-blocking statements as well as their interaction with the s...
Martin Zambaldi, Wolfgang Ecker, T. Kruse, W. M&uu...
168
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CLA
2004
15 years 5 months ago
Ontology Design with Formal Concept Analysis
Ontologies, often defined as an explicit specification of conceptualization, are necessary for knowledge representation and knowledge exchange. Usually this means that ontology des...
Marek Obitko, Václav Snásel, Jan Smi...