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195
Voted
FORMATS
2004
Springer
15 years 10 months ago
2004
Springer
We discuss the modeling and verification of real-time systems using the SAL model checker. A new modeling framework based on event calendars enables dense timed systems to be descr...
173
Voted
FMCAD
2000
Springer
15 years 9 months ago
2000
Springer
We take a fresh look at the problem of how to check safety properties of finite state machines. We are particularly interested in checking safety properties with the help of a SAT-...
201
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EURODAC
1995
IEEE
15 years 9 months ago
1995
IEEE
This paper proposes a new method to design an optimal instruction set for pipelined ASIP development using a formal HW/SW codesign methodology. The codesign task addressed in this...
182
Voted
DATE
2009
IEEE
16 years 27 days ago
2009
IEEE
—Verification is a major issue in circuit and system design. Formal methods like bounded model checking (BMC) can guarantee a high quality of the verification. There are severa...
158
Voted
IFM
1999
Springer
15 years 10 months ago
1999
Springer
The feature interaction problem is prominent in telephone service development. Through a number of case studies, we have discovered that no single semantic framework is suitable f...