531 search results - page 10 / 107 » Formal Methods for Networks on Chips |
89
Voted
ACSD
2004
IEEE
15 years 1 months ago
2004
IEEE
The design productivity gap has been recognized by the semiconductor industry as one of the major threats to the continued growth of system-on-chips and embedded systems. Ad-hoc s...
111
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DATE
2003
IEEE
15 years 2 months ago
2003
IEEE
Interconnect networks play a critical role in shared memory multiprocessor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the pac...
MICRO
2008
IEEE
14 years 9 months ago
2008
IEEE
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
120
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ASM
2010
ASM
14 years 9 months ago
2010
ASM
This paper presents Matelas, a B predicate calculus definition for social networking, modelling social-network content, privacy policies, social-networks friendship relations, and ...
CHARME
2001
Springer
15 years 1 months ago
2001
Springer
The framework of this paper is the formal specification and proof of applications distributed on symmetric interconnection networks, e.g. the torus or the hypercube. The algorithms...