531 search results - page 12 / 107 » Formal Methods for Networks on Chips |
DAC
2007
ACM
15 years 10 months ago
2007
ACM
Off-chip decoupling capacitor (decap) allocation is a demanding task during package and chip codesign. Existing approaches can not handle large numbers of I/O counts and large num...
ICCAD
2009
IEEE
14 years 7 months ago
2009
IEEE
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
3DIC
2009
IEEE
15 years 2 months ago
2009
IEEE
- In this paper, an electrical-thermal co-analysis method for power delivery networks in 3D system integration is proposed. For electrical analysis, temperature-dependent electrica...
74
Voted
WWW
2004
ACM
15 years 10 months ago
2004
ACM
We present a method for representing and reasoning with uncertainty in RDF(S) and OWL ontologies based on Bayesian networks. Categories and Subject Descriptors: I.2.4 Artificial I...
CSREASAM
2007
14 years 11 months ago
2007
In this paper, we propose an architecture that protects software by the hardware. The protection hardware can reside on the local machine in the form of a chip or on a remote serv...