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» Formal Methods for Networks on Chips
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NOSSDAV
2005
Springer
15 years 3 months ago
A formal approach to design optimized multimedia service overlay
Service overlay networks have recently attracted tremendous interests. In this paper, we propose a new integrated framework for specifying services composed of service components ...
Hirozumi Yamaguchi, Khaled El-Fakih, Akihito Hirom...
COSIT
2009
Springer
125views GIS» more  COSIT 2009»
15 years 1 months ago
Merging Qualitative Constraint Networks Defined on Different Qualitative Formalisms
Abstract. This paper addresses the problem of merging qualitative constraint networks (QCNs) defined on different qualitative formalisms. Our model is restricted to formalisms wher...
Jean-François Condotta, Souhila Kaci, Pierr...
97
Voted
ICCD
2004
IEEE
119views Hardware» more  ICCD 2004»
15 years 6 months ago
I/O Clustering in Design Cost and Performance Optimization for Flip-Chip Design
I/O placement has always been a concern in modern IC design. Due to flip-chip technology, I/O can be placed throughout the whole chip without long wires from the periphery of the...
Hung-Ming Chen, I-Min Liu, Martin D. F. Wong, Muzh...
74
Voted
DATE
2008
IEEE
109views Hardware» more  DATE 2008»
15 years 4 months ago
Layout-Aware, IR-Drop Tolerant Transition Fault Pattern Generation
— Market and customer demands have continued to push the limits of CMOS performance. At-speed test has become a common method to ensure these high performance chips are being shi...
Jeremy Lee, Sumit Narayan, Mike Kapralos, Mohammad...
94
Voted
IPPS
2006
IEEE
15 years 3 months ago
Formal modeling and analysis of wireless sensor network algorithms in Real-Time Maude
Advanced wireless sensor network algorithms pose challenges to their formal modeling and analysis, such as modeling probabilistic and real-time behaviors and novel forms of commun...
Peter Csaba Ölveczky, Stian Thorvaldsen