531 search results - page 14 / 107 » Formal Methods for Networks on Chips |
AINA
2003
IEEE
15 years 1 months ago
2003
IEEE
Condition Data Flow Diagrams (CDFDs) are a formalized notation resulting from the integration of Yourdon Data Flow Diagrams, Petri Nets, and pre-post notation. They are used in th...
82
Voted
DATE
2004
IEEE
15 years 1 months ago
2004
IEEE
System level modeling with executable languages such as C/C++ has been crucial in the development of large electronic systems from general processors to application specific desig...
85
Voted
ICML
2003
IEEE
15 years 10 months ago
2003
IEEE
We analyze the formal grounding behind Negative Correlation (NC) Learning, an ensemble learning technique developed in the evolutionary computation literature. We show that by rem...
AUSAI
2006
Springer
15 years 1 months ago
2006
Springer
Abstract. In order to apply nonmonotonic logics for specifying industrial automation controllers, we define (1) a method to extend atemporal nonmonotonic logics with temporal opera...
BMCBI
2010
2010
The IronChip evaluation package: a package of perl modules for robust analysis of custom microarrays
14 years 9 months ago
Background: Gene expression studies greatly contribute to our understanding of complex relationships in gene regulatory networks. However, the complexity of array design, producti...