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» Formal Methods for Networks on Chips
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ADAEUROPE
2005
Springer
15 years 3 months ago
Non-intrusive System Level Fault-Tolerance
This paper describes the methodology used to add nonintrusive system-level fault tolerance to an electronic throttle controller. The original model of the throttle controller is a...
Kristina Lundqvist, Jayakanth Srinivasan, Sé...
74
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FMCAD
2006
Springer
15 years 1 months ago
Synchronous Elastic Networks
We formally define--at the stream transformer level--a class of synchronous circuits that tolerate any variability in the latency of their environment. We study behavioral properti...
Sava Krstic, Jordi Cortadella, Michael Kishinevsky...
ISEMANTICS
2010
14 years 8 months ago
Towards an approach for formalizing the supply chain operations
Reference models play an important role in the knowledge management of the various complex collaboration domains (such as Supply Chain Networks). However, they often show a lack o...
Milan Zdravkovic, Hervé Panetto, Miroslav T...
DSN
2008
IEEE
14 years 11 months ago
Experiences with formal specification of fault-tolerant file systems
Fault-tolerant, replicated file systems are a crucial component of today's data centers. Despite their huge complexity, these systems are typically specified only in brief pr...
Roxana Geambasu, Andrew Birrell, John MacCormick
CODES
2004
IEEE
15 years 1 months ago
System-on-chip validation using UML and CWL
In this paper, a novel method for high-level specification and validation of SoC designs using UML is proposed. UML is introduced as a formal model of specification for SoC design...
Qiang Zhu, Ryosuke Oishi, Takashi Hasegawa, Tsuneo...