531 search results - page 3 / 107 » Formal Methods for Networks on Chips |
FMCAD
2007
Springer
15 years 3 months ago
2007
Springer
— The concept of applying partial fencing to logic built-in self test (LBIST) hardware structures for the purpose of using partially good chips is well known in the chip design i...
SIGMETRICS
2008
ACM
14 years 9 months ago
2008
ACM
ISNN
2005
Springer
15 years 3 months ago
2005
Springer
Built on the theories of biological neural network, artificial neural network methods have shown many significant advantages. However, the memory space in an artificial neural chip...
CODES
2006
IEEE
15 years 3 months ago
2006
IEEE
Lowering down the chip temperature is becoming one of the important design considerations, since temperature adversely and seriously affects many of design qualities, such as reli...