531 search results - page 40 / 107 » Formal Methods for Networks on Chips |
KRDB
2003
14 years 11 months ago
2003
Given the numerous knowledge representation models (KR-schemes) that have been proposed, it would be desirable to have a formal, unifying model for the description of a KR-scheme,...
GLVLSI
2005
IEEE
15 years 3 months ago
2005
IEEE
We have presented an optimal on-chip buffer allocation and buffer insertion methodology which uses stochastic models of the architecture. This methodology uses finite buffer s...
DATE
2010
IEEE
15 years 2 months ago
2010
IEEE
We have proposed (, )-based flow regulation to reduce delay and backlog bounds in SoC architectures, where bounds the traffic burstiness and the traffic rate. The regulation is co...
DFT
2004
IEEE
15 years 1 months ago
2004
IEEE
A 3D Heterogeneous Sensor using a stacked chip is investigated. Optical Active Pixel Sensor and IR Bolometer detectors are combined to create a multispectral pixel for aligned col...
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BMCBI
2010
14 years 9 months ago
2010
Background: RNA structure prediction problem is a computationally complex task, especially with pseudo-knots. The problem is well-studied in existing literature and predominantly ...