531 search results - page 42 / 107 » Formal Methods for Networks on Chips |
MEMOCODE
2007
IEEE
15 years 4 months ago
2007
IEEE
Bluespec is a high-level hardware description language used for architectural exploration, hardware modeling and synthesis of semiconductor chips. In Bluespec, one views hardware ...
MEMOCODE
2007
IEEE
15 years 4 months ago
2007
IEEE
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...
DAC
2010
ACM
15 years 1 months ago
2010
ACM
Timing exception verification has become a center of interest as incorrect constraints can lead to chip failures. Proving that a false path is valid or not is a difficult problem ...
DSD
2006
IEEE
15 years 1 months ago
2006
IEEE
We present a performance-oriented refinement approach that refines a perfectly synchronous communication model onto Network-on-Chip (NoC) communication. We first identify four bas...
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CMSB
2011
Springer
13 years 9 months ago
2011
Springer
Abstract. This paper tackles theoretically the question of the structural stability of biological regulation networks subjected to the influence of their environment. The model of...