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» Formal Methods for Networks on Chips
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DATE
2004
IEEE
116views Hardware» more  DATE 2004»
15 years 1 months ago
Full-Chip Multilevel Routing for Power and Signal Integrity
Conventional physical design flow separates the design of power network and signal network. Such a separated approach results in slow design convergence for wire-limited deep sub-...
Jinjun Xiong, Lei He
DANCE
2002
IEEE
15 years 2 months ago
Maude as a Wide-Spectrum Framework for Formal Modeling and Analysis of Active Networks
Modeling and formally analyzing active network systems and protocols is quite challenging, due to their highly dynamic nature and the need for new network models. We propose a wid...
José Meseguer, Peter Csaba Ölveczky, M...
COMPUTER
2002
129views more  COMPUTER 2002»
14 years 9 months ago
Networks on Chips: A New SoC Paradigm
of abstraction and coarse granularity and distributed communication control. Focusing on using probabilistic metrics such as average values or variance to quantify design objective...
Luca Benini, Giovanni De Micheli
75
Voted
IAT
2008
IEEE
15 years 4 months ago
Understanding Social Networks Using Formal Concept Analysis
Social networks are very popular nowadays and the understanding of their inner structure seems to be promising area. Several approaches for the social network structure visualizat...
Václav Snásel, Zdenek Horak, Ajith A...
ISQED
2005
IEEE
119views Hardware» more  ISQED 2005»
15 years 3 months ago
Fast Decap Allocation Algorithm For Robust On-Chip Power Delivery
Adding on-chip decoupling capacitors (decaps) is an effective way to reduce voltage noise in power/ground networks and ensure robust power delivery. In this paper, we present a fa...
Zhenyu Qi, Hang Li, Sheldon X.-D. Tan, Lifeng Wu, ...