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ICCAD
2008
IEEE
125views Hardware» more  ICCAD 2008»
15 years 8 months ago
A succinct memory model for automated design debugging
— In today’s complex SoC designs, verification and debugging are becoming ever more crucial and increasingly timeconsuming tasks. The prevalence of embedded memories adds to t...
Brian Keng, Hratch Mangassarian, Andreas G. Veneri...
ACSC
2004
IEEE
15 years 3 months ago
Verification of the Futurebus+ Cache Coherence protocol: A case study in model checking
This paper presents a case study for automatic verification using the Communicating Sequential Processes formalism. The case study concerns the Futurebus+ cache coherency standard...
Kylie Williams, Robert Esser
ACOM
2006
Springer
15 years 5 months ago
On the Semantics of Conditional Commitment
Abstract. In this paper, we identify some problems with current formalizations of conditional commitments, i.e. commitments to achieve a goal if some condition becomes true. We pre...
Shakil M. Khan, Yves Lespérance
ENTCS
2010
130views more  ENTCS 2010»
14 years 11 months ago
Compositional System Security with Interface-Confined Adversaries
This paper presents a formal framework for compositional reasoning about secure systems. A key insight is to view a trusted system in terms of the interfaces that the various comp...
Deepak Garg, Jason Franklin, Dilsun Kirli Kaynar, ...
ICEGOV
2007
ACM
15 years 3 months ago
Formal threat descriptions for enhancing governmental risk assessment
Compared to the last decades, we have recently seen more and more governmental applications which are provided via the Internet directly to the citizens. Due to the long history o...
Andreas Ekelhart, Stefan Fenz, Thomas Neubauer, Ed...