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DAC
1994
ACM
15 years 1 months ago
Error Diagnosis for Transistor-Level Verification
This paper describes a diagnosis technique for locating design errors in circuit implementations which do not match their functional specification. The method efficiently propagat...
Andreas Kuehlmann, David Ihsin Cheng, Arvind Srini...
VLSID
2002
IEEE
177views VLSI» more  VLSID 2002»
15 years 10 months ago
RTL-Datapath Verification using Integer Linear Programming
Satisfiability of complex word-level formulas often arises as a problem in formal verification of hardware designs described at the register transfer level (RTL). Even though most...
Raik Brinkmann, Rolf Drechsler
ICECCS
1999
IEEE
140views Hardware» more  ICECCS 1999»
15 years 1 months ago
Practical Considerations in Protocol Verification: The E-2C Case Study
We report on our efforts to formally specify and verify a new protocol of the E-2C Hawkeye Early Warning Aircraft. The protocol, which is currently in test at Northrop Grumman, su...
Yifei Dong, Scott A. Smolka, Eugene W. Stark, Step...
DAC
2007
ACM
15 years 1 months ago
Memory Modeling in ESL-RTL Equivalence Checking
When designers create RTL models from a system-level specification, arrays in the system-level model are often implemented as memories in the RTL. Knowing the correspondence betwe...
Alfred Kölbl, Jerry R. Burch, Carl Pixley
ICTAI
1997
IEEE
15 years 1 months ago
GA-Based Performance Analysis of Network Protocols
This paper tackles the problem of analyzing the correctness and performance of a computer network protocol. Given the complexity of the problem, no currently used technique is abl...
Mario Baldi, Fulvio Corno, Maurizio Rebaudengo, Gi...