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» Formal Models for Embedded System Design
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ATS
2010
IEEE
239views Hardware» more  ATS 2010»
14 years 5 months ago
Efficient Simulation of Structural Faults for the Reliability Evaluation at System-Level
In recent technology nodes, reliability is considered a part of the standard design flow at all levels of embedded system design. While techniques that use only low-level models at...
Michael A. Kochte, Christian G. Zoellin, Rafal Bar...
ICSE
2003
IEEE-ACM
15 years 10 months ago
Towards a Systems Engineering Pattern Language: Applying i* to Model Requirements-Architecture Patterns
This paper reports the results of exploratory research to develop a pilot pattern language for systems engineers at BAE SYSTEMS. The pattern language was designed to encapsulate k...
Pete Pavan, Neil A. M. Maiden, Xiaohong Zhu
VSTTE
2005
Springer
15 years 3 months ago
Model Checking: Back and Forth between Hardware and Software
The interplay back and forth between software model checking and hardware model checking has been fruitful for both. Originally intended for the analysis of concurrent software, mo...
Edmund M. Clarke, Anubhav Gupta, Himanshu Jain, He...
DLOG
2003
14 years 11 months ago
Applying Description Logic to Product Behavioral Design within Advanced CAD Systems
In this paper, we investigate the use of Description Logic (DL) for representing Product Behavioral constraints in Computer Aided Design (CAD) Systems. In an integrated design app...
François de Bertrand de Beuvron, Amadou Cou...
ISSS
2002
IEEE
144views Hardware» more  ISSS 2002»
15 years 2 months ago
A Visual Approach to Validating System Level Designs
This paper proposes a simulation-based methodology for validation of a system under design in an early phase of development. The key element of this approach is the visual speciï¬...
Jürgen Ruf, Thomas Kropf, Jochen Klose