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» Formal Models for Embedded System Design
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MEMOCODE
2007
IEEE
15 years 4 months ago
Towards Equivalence Checking Between TLM and RTL Models
The always increasing complexity of digital system is overcome in design flows based on Transaction Level Modeling (TLM) by designing and verifying the system at difbstraction le...
Nicola Bombieri, Franco Fummi, Graziano Pravadelli...
ICCD
2005
IEEE
124views Hardware» more  ICCD 2005»
15 years 3 months ago
Model Checking C Programs Using F-SOFT
— With the success of formal verification techniques like equivalence checking and model checking for hardware designs, there has been growing interest in applying such techniqu...
Franjo Ivancic, Ilya Shlyakhter, Aarti Gupta, Mala...
ICALP
1994
Springer
15 years 2 months ago
Liveness in Timed and Untimed Systems
When provingthe correctness of algorithmsin distributed systems, one generally considers safety conditions and liveness conditions. The Input Output I O automaton model and its ti...
Rainer Gawlick, Roberto Segala, Jørgen F. S...
RTSS
2009
IEEE
15 years 4 months ago
Multiprocessor Extensions to Real-Time Calculus
Abstract—Many embedded platforms consist of a heterogeneous collection of processing elements, memory modules, and communication subsystems. These components often implement diff...
Hennadiy Leontyev, Samarjit Chakraborty, James H. ...
TCSV
2008
124views more  TCSV 2008»
14 years 10 months ago
A Novel Look-Up Table Design Method for Data Hiding With Reduced Distortion
Look-up table (LUT)-based data hiding is a simple and efficient technique to hide secondary information (watermark) into multimedia work for various applications such as copyright ...
Xiao-Ping Zhang, Kan Li, Xiaofeng Wang