1784 search results - page 218 / 357 » Formal Models for Embedded System Design |
DAC
2006
ACM
15 years 4 months ago
2006
ACM
Architectural decisions for DSP modules are often analyzed using high level C models. Such high-level explorations allow early examination of the algorithms and the architectural ...
DIAGRAMS
2000
Springer
15 years 2 months ago
2000
Springer
Spider diagram systems provide a visual language that extends the popular and intuitive Venn diagrams and Euler circles. Designed to complement object-oriented modelling notations ...
ICCAD
2006
IEEE
15 years 7 months ago
2006
IEEE
In this paper, for the first time, a theory for evaluating dynamic noise margins of SRAM cells is developed analytically. The results allow predicting the transient error suscepti...
ISVLSI
2007
IEEE
15 years 4 months ago
2007
IEEE
Formal verification has become an important step in circuit and system design. A prominent technique is Bounded Model Checking (BMC) which is widely used in industry. In BMC it i...
SIGSOFT
2003
ACM
15 years 10 months ago
2003
ACM
State machine based formalisms such as labelled transition systems (LTS) are generally assumed to be complete descriptions m behaviour at some level of abstraction: if a labelled ...